Shape the future of Google Cloud Silicon as a Silicon Engineering Intern. You will contribute to cutting-edge projects, including TPUs, arm-based servers, and network products. Collaborate with leading architects and designers to conceptualize, model, analyze, and define next-generation cloud silicon solutions. This role offers a unique opportunity to influence product definition, design, and implementation, balancing performance, power, features, schedule, and cost.

The ML, Systems, and Cloud AI (MSCA) organization is at the forefront of developing and managing the hardware, software, machine learning, and systems infrastructure that power all Google services and Google Cloud. We ensure security, efficiency, and reliability across our operations, from developing advanced silicon to managing a global network, all while driving the evolution of hyperscale computing. Google is fundamentally an engineering company, committed to solving complex technological challenges and impacting billions of users worldwide through innovation in areas like Search, Ads, Chrome, Android, and YouTube.

As a Silicon Engineering Intern, your responsibilities will be dynamic and team-dependent. You will engage in the architecting, modeling, analysis, definition, and design of next-generation Cloud Silicon. This includes collaborating closely with hardware and software architects and designers. You will also work with engineering teams to achieve the optimal balance between performance, power consumption, features, schedule adherence, and cost-effectiveness for our cloud silicon products.

Location preference can be expressed for Bengaluru, Karnataka, India, or Hyderabad, Telangana, India.

To be considered for this internship, you must be currently pursuing a PhD degree in Computer Engineering, Computer Science, Electronics and Communication Engineering, Electrical Engineering, or a related technical field. Essential technical skills include experience with programming languages like C++, Python, Verilog, and UVM, as well as proficiency with Synopsys and Cadence tools.

Demonstrated experience in at least one of the following areas is required: hardware system integration, product design, computer architecture, digital design verification, digital circuits, ASIC physical design, FPGAs, embedded systems, or memory systems.

Preferred qualifications include currently studying in a degree program in India and availability for a 12-week full-time internship outside of university term time. Experience with performance modeling tools, C++, Python, or silicon design tools in front-end, design verification, or physical design is advantageous. Familiarity with arithmetic units, bus architectures, accelerators, memory hierarchies, computer architecture, linear algebra, or ML/DL backgrounds, along with knowledge of high-performance and low-power design techniques, will further strengthen your application.