Join Google Cloud and contribute to shaping the future of AI/ML hardware acceleration by driving cutting-edge TPU technology. This role involves developing custom silicon solutions that power Google's advanced AI/ML applications and verifying complex digital designs with a specific focus on TPU architecture within AI/ML-driven systems.

This position offers an opportunity to be part of a team that is redefining what's possible, delivering AI and Infrastructure at unparalleled scale and efficiency. You'll empower Google customers with breakthrough capabilities and insights, contributing to groundbreaking innovations from software to hardware, including TPUs and Vertex AI for Google Cloud.

Build and deliver complex SoC designs as full chip emulation or FPGA prototypes to various customer teams, including Software, Firmware, and Post-Silicon Validation.

Influence design and verification teams to enhance emulation-friendly model development.

Facilitate system-level emulation model bring-up, including reset, boot, and bare metal content or OS execution.

Collaborate with Architects, Designers, Software Engineers, and Pre/Post-Silicon Verification Engineers to develop test plans, ensure coverage, and reproduce failures on emulation platforms.

Develop, execute, and debug full-chip/SoC tests on emulation platforms, while actively exploring and implementing new verification and emulation methodologies.

A Bachelor's degree or equivalent practical experience is required, alongside at least 5 years of experience in full-chip/SoC verification. This includes expertise in test definition, creation, execution, and debug.

Demonstrate experience in developing full-chip/SoC tests using environments and tools like ASM, C, C++, Perspec, OS, or drivers. Proficiency with industry-standard emulator technologies (e.g., HAPS, Zebu, Veloce, Palladium) is essential, covering build tools to advanced capabilities like power-aware emulation.

Experience with execution and RTL/firmware/software debug on hardware emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA platforms (e.g., Xilinx, Altera) is also a key requirement.