Join NVIDIA as a Senior Verification Engineer and play a pivotal role in shaping the future of PCI Express controllers for cutting-edge GPUs and SOCs. This is a unique opportunity to contribute to industry-leading products in areas like gaming, self-driving cars, and artificial intelligence. Be part of a globally connected team that is pushing the boundaries of computing and defining the next era of technology. NVIDIA is at the forefront of parallel and visual computing, transforming how complex problems are solved.

Our GPUs, initially renowned for powering virtual worlds, now simulate human intelligence, driving advancements in AI, robotics, and autonomous vehicles. NVIDIA is recognized as a leader in AI computing, empowering devices to perceive and comprehend the world around them.

Take ownership of the verification process for ASIC designs, architectures, golden models, and micro-architectures of PCIE controllers at IP and sub-system levels. Utilize state-of-the-art methodologies like UVM to ensure design integrity.

Develop robust, reusable bus functional models, monitors, checkers, and scoreboards, adhering to a coverage-driven verification approach.

Deeply understand design specifications and implementation details. Define verification scope, create comprehensive test plans, develop tests, and build the necessary verification infrastructure to validate design correctness.

Collaborate closely with architects, designers, and pre and post-silicon verification teams to achieve project milestones.

A Bachelor's or Master's degree in Engineering, or equivalent practical experience is required. You should possess over 4 years of relevant professional experience.

Demonstrated expertise in verification at the Unit, Sub-system, or SOC level, with strong skills in Verilog and SystemVerilog.

Proven experience in the comprehensive verification of IP or interconnect protocols such as PCI Express, USB, or SATA.

Experience in building and working within functional coverage-based constrained random verification environments is essential.

Familiarity with DV methodologies like UVM/VMM and experience with industry-standard simulation and debug tools are expected.

Standout qualifications include deep knowledge of PCI Express protocol (Gen3 and above), a solid understanding of PCIE/CXL-based system-level architectures, and proficiency in scripting languages like Perl or Python. Excellent analytical, debugging, and interpersonal skills are highly valued, along with a strong desire to be a collaborative team player.