Join NVIDIA as a Senior Verification Engineer and play a pivotal role in verifying next-generation PCI Express controllers for industry-leading GPUs and SOCs. This is an exceptional opportunity to contribute to cutting-edge technology in a dynamic environment, impacting product lines from consumer graphics to autonomous vehicles and AI.

NVIDIA is at the forefront of parallel and visual computing, transforming how graphics solve complex problems. Our GPUs, initially powering virtual worlds, now simulate human intelligence, driving AI, robotics, and self-driving cars. Become part of an elite team that shapes the future of computing.

As a key member of our verification team, you will be instrumental in ensuring the integrity of ASIC designs, architectures, golden models, and micro-architectures for PCIE controllers at IP and sub-system levels, employing state-of-the-art methodologies like UVM.

You will develop reusable bus functional models, monitors, checkers, and scoreboards, adhering to coverage-driven verification principles. This involves a deep dive into design specifications and implementations, defining verification scopes, crafting test plans, developing tests, and building the necessary verification infrastructure to validate design correctness.

We are seeking candidates with a B.Tech./M.Tech or equivalent experience, coupled with over 5 years of dedicated verification expertise. Proficiency in Verilog and SystemVerilog is essential, alongside a proven track record in comprehensive IP or interconnect protocol verification, such as PCI Express or USB.

Demonstrated experience in developing and implementing functional coverage-based constrained random verification environments is crucial. Familiarity with DV methodologies like UVM/VMM and experience with industry-standard simulation and debug tools are highly valued. Exceptional knowledge of PCI Express protocols (Gen3 and above) and a solid understanding of PCIE/CXL-based system architectures are significant advantages.