Join NVIDIA, a pioneer in GPU technology and artificial intelligence. We are seeking motivated individuals for our automotive verification team, focusing on next-generation automotive chips and systems. This role offers exposure to cutting-edge technologies including high-performance CPU and Memory sub-systems, NOC-based Interconnect Fabric, and High-speed IOs within our Tegra chips. Be part of a dynamic environment where innovation drives our work to amplify human creativity and intelligence.

Architect and develop advanced UVM-based verification test benches and methodologies for complex IPs and subsystems. Engage in system-level verification using C/C++. Drive key verification aspects including testbench architecture, test plan definition, test creation, and verification infrastructure development for modules, clusters, and systems. Build efficient and reusable bus functional models, monitors, checkers, and scoreboards. Implement functional coverage and ensure verification closure. Collaborate closely with architects, designers, FPGA, and post-silicon teams to guarantee unit robustness.

A Bachelor's or Master's degree in Engineering with over 5 years of experience in verification closure at the Unit, Sub-system, or SOC level is required. Experience in domains such as CPU verification, Memory controller verification, Interconnect verification, High-speed IO verification (UFS/PCIE/XUSB), Ethernet MAC and Switch, Bus protocols (AXI/APB), and system functions like Safety, Security, or Virtualization is highly desirable. Proficiency in the latest verification methodologies like UVM/VMM and familiarity with industry-standard simulation and debug tools are essential. Strong debugging, analytical, interpersonal, and communication skills are crucial for effective collaboration with cross-cultural teams.