Join NVIDIA's Digital IP (DIP) group as a Senior SRAM Circuit Design Engineer and contribute to the development of cutting-edge IP for our world-changing chips. This high-visibility role offers the opportunity to work on sophisticated SRAM compilers and influence the future of advanced process nodes. Be part of a team that amplifies human creativity and intelligence.

NVIDIA is at the forefront of innovation, from the invention of the GPU to revolutionizing AI. Our commitment to pushing boundaries in computing power requires talented individuals who can tackle complex challenges. Immerse yourself in a diverse and supportive environment where your best work is inspired and impactful.

As a Senior SRAM Circuit Design Engineer, you will be instrumental in:

- Designing SRAM macros at the transistor level, overseeing layout, and performing physical and logical verification. - Developing and coding more efficient SRAM compiler methodologies for automated assembly and validation. - Exploring future process nodes to optimize power, performance, and area characteristics. - Collaborating with SOC design teams, guiding silicon test and characterization, and supporting productization efforts for demanding real-world applications.

We are seeking candidates with:

- A minimum of a BSEE or equivalent experience, with an MSEE or PhD being preferred. - Over 5 years of dedicated SRAM design experience, including a strong foundation in digital circuit design, layout, and verification on advanced FinFET processes. - Proven experience designing single-port, dual-port, or register file SRAM macros, encompassing complex circuits such as self-timed logic and sense-amplifiers. - Proficiency in Python scripting for data parsing and task automation. - A successful history of delivering designs through to production.