Join NVIDIA's expanding Networking Chip Design team in India as a Senior SOC Verification Engineer. You will be instrumental in verifying cutting-edge Smart Network Interface Cards (Smart-NICs) and Data Processing Units (DPUs). These advanced chips are designed to significantly boost network performance and reduce CPU overhead through intelligent hardware acceleration, including inline encryption and decryption. This role offers a unique opportunity to contribute to high-performance RDMA services for demanding applications.

Integrate project components to meet defined milestones, delivering models for cluster, sub-system, SOC, and emulation levels. Develop robust verification infrastructure and automated flows for seamless IP integration. Employ advanced methodologies like e-specman and SV-UVM, leveraging scripting languages such as Python and Perl. Collaborate closely with design teams to understand architecture and partner with Quality Assurance for superior test coverage and hardware quality. Coordinate effectively with internal and external teams across various time zones.

A Bachelor's or Master's degree in EEE or ECE, coupled with over 4 years of experience in design verification. A solid grasp of logic design and architecture is essential, alongside strong coding proficiency in SystemVerilog, scripting languages (Perl/Python), and C++. The ability to collaborate effectively across multiple groups is key. Familiarity with design and verification tools, including simulators (Cadence or equivalent) and debug tools (Indago, GDB), is expected. Experience with cluster, sub-system, full-chip, or SOC-level verification environments is highly advantageous.