Join a pioneering Networking Chip Design team as a Senior SOC Design and Integration Engineer. You will be instrumental in crafting and implementing next-generation innovative DPUs and Switch Silicon chips. This role offers a significant impact within a dynamic, technology-focused company, contributing to the development of high-speed communication devices known for their efficiency and low latency.

The Networking Chip Design team in India is expanding rapidly, providing an exciting opportunity to grow your career.

Take ownership of understanding project features and defining milestones based on internal roadmaps. You will assign tasks and track progress using an agile framework.

Develop system-level methodologies, tools, and IPs to efficiently build scalable subsystems. Collaborate closely with the SOC Assembly team to drive cross-functional teams towards achieving SOC milestones.

Integrate all project components to meet defined milestones and deliver models for subsequent verification stages, including cluster, sub-system, SOC, and emulation levels.

A Bachelor's degree (BS) or equivalent experience, coupled with a Master's degree (MS) and over 3 years of hands-on semiconductor design and architecture experience in building complex SoCs is essential.

Demonstrate a solid understanding and practical experience across all phases of SOC development, including ASIC architecture, Micro-Architecture, RTL design, verification, timing closure, and physical design.

Proficiency with design and verification tools such as Verilog/SV, Cadence simulation tools, and debug tools like Indago or GDB is required. Experience with C/C++, Python, or other industry-standard scripting languages is advantageous.

Experience working with software teams to define HW/SW interfaces, including control/status registers, interrupt, and error handling, is crucial. Successful tape-outs of multiple sophisticated, high-volume SoCs in advanced process nodes are a strong indicator of capability.

Familiarity with various Chip Design functions is necessary to effectively collaborate and resolve complex cross-functional challenges. Excellent communication skills, both verbal and written, are vital for building consensus across diverse teams.

Experience in synthesis, physical design, DFT, RTL build, and design automation are considered beneficial. Technical leadership experience in delivering complex SOCs for enterprise or HPC applications, along with RTL coding, debug, and performance/power/area analysis, will set you apart. Prior experience with smartNICs or high-speed interconnects is also highly valued.