Join a pioneering team developing custom silicon solutions that are integral to Google's direct-to-consumer products. You will play a key role in creating next-generation hardware experiences, focusing on unparalleled performance, efficiency, and integration for products used by millions globally.

The AI and Infrastructure team is at the forefront of innovation, empowering Google customers with advanced capabilities and insights. We deliver AI and Infrastructure at exceptional scale, efficiency, reliability, and velocity, serving Googlers, Google Cloud customers, and billions of users worldwide. Our work is foundational to Google's groundbreaking innovations, driving the development of cutting-edge AI models, providing immense computing power for global services, and building essential platforms for developers.

This role contributes to the future of world-leading hyperscale computing, with teams focused on TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, and systems research.

Plan and execute the verification of digital design blocks by thoroughly understanding design specifications and collaborating with design engineers to pinpoint critical verification scenarios.

Develop and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM). Employ SystemVerilog Assertions and leading formal tools to verify designs.

Define and implement various coverage measures to capture stimulus and corner-case scenarios. Debug tests in conjunction with design engineers to ensure functionally correct design blocks.

Achieve coverage goals to identify potential verification gaps and demonstrate readiness for tape-out.

A Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline, or equivalent practical experience, is required.

Possess at least 8 years of experience in creating and utilizing verification components and environments within standard verification methodologies.

Demonstrate experience in verifying digital systems using standard IP components and interconnects, such as microprocessor cores and hierarchical memory subsystems.

Proven experience with verification techniques and the complete verification lifecycle, including performance verification of ASICs and their components.

Significant experience across multiple SoC/IP projects and cycles, contributing to three or more distinct products is essential.

Preferred qualifications include a Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with a specialization in computer architecture. Experience with industry-standard simulators, revision control, and regression systems is advantageous.

Experience in Artificial Intelligence/Machine Learning (AI/ML) accelerators or vector processing units is a plus, as are excellent problem-solving and communication skills.