Join NVIDIA, a global leader in pioneering GPU technology and revolutionizing parallel computing. We are seeking a motivated Senior Package Layout Engineer to contribute to the design and development of advanced IC substrates for cutting-edge NVIDIA products. This role offers a dynamic environment to collaborate with technical leads and design teams, tackle complex engineering challenges, and drive innovation in a company known for its transformative impact.

As a key member of our Layout team, you will be instrumental in implementing high-speed, high-density ASIC packages. Your responsibilities will include performing substrate breakout patterns, optimizing package pinouts with system-level trade-offs, and contributing to package routing, placement, and stack-up design using Cadence APD or SiP tools. You will also conduct design feasibility studies and develop methodologies to enhance layout productivity, ensuring our products meet stringent size, cost, and performance goals.

Candidates should possess a B.S. in Electrical Engineering or equivalent experience, coupled with a minimum of 5 years in PCB Layout for graphics cards, motherboards, or similar technologies. Proven experience with substrate layout for wire bond and flip chip packages is essential. Familiarity with Cadence APD or SiP, and PCB layout tools (including Constraint Manager) is required. A strong understanding of high-speed design signal integrity practices is also necessary. Experience with Virtuoso, Calibre, or Valor will be considered a plus.