Join NVIDIA, a leader in innovation, and contribute to the development of world-leading GPUs and SOCs. We are seeking a dedicated Senior Package Layout Engineer to design and develop sophisticated IC substrates. This role involves close collaboration with technical leads and design teams to address complex engineering challenges and drive advancements in power, performance, and efficiency.

NVIDIA is a dynamic environment where creativity and intelligence are amplified. As part of our team, you'll be immersed in a supportive and diverse culture, inspiring you to do your best work and make a lasting impact. We are committed to solving challenging problems that matter to the world.

As a key member of the Layout team, you will be instrumental in implementing high-speed, high-density ASIC packages. Your responsibilities will include creating substrate breakout patterns and optimizing package pinouts with system-level trade-offs. You'll also perform package routing, placement, and stack-up analysis using Cadence APD or SiP tools, and propose layout design trade-offs for resolution.

Additionally, you will conduct design feasibility studies to meet package design goals for size, cost, and performance. Developing symbols and CAD library databases, along with creating methodologies to enhance layout productivity, will also be integral to this role.

We are looking for a candidate with a B.S. in Electrical Engineering or equivalent experience, coupled with over 5 years in PCB Layout of graphics cards, motherboards, or related technologies. Proven experience in substrate layout for wire bond and flip chip packages is highly preferred.

Essential skills include significant background with Cadence APD or SiP tools and PCB layout tools with Constraint Manager. A solid understanding of high-speed design signal integrity practices is crucial. Experience with Virtuoso, Calibre, or Valor will be considered a strong advantage.