Join NVIDIA's dynamic team as a Senior Mask Layout Design Engineer. Contribute to the innovation driving advancements in AI and parallel computing. You'll be part of a collaborative environment focused on tackling challenging problems and making a global impact.

This role is ideal for an experienced professional passionate about high-speed mixed-signal circuit designs within cutting-edge sub-micron CMOS technologies.

Execute physical layout for critical mixed-signal functions, including PLLs, high-speed SerDes, ADCs, and ESD structures, utilizing advanced Cadence tools.

Collaborate closely with ASIC and mixed-signal engineers to tailor designs for seamless integration into VLSI products. Engage in floor planning, custom layout development, and rigorous verification against design rules and schematics.

A Bachelor of Science in Electrical Engineering (BSEE) or equivalent experience is required, complemented by a minimum of 7 years in Mask and Layout Design.

Possess a profound understanding of analog circuit layout principles in submicron CMOS technologies and be an expert user of Cadence custom circuit design tools, especially Virtuoso. Proficiency in verification tools such as Dracula, Hercules, Calibre, and Primeyield is essential.

Demonstrate strong teamwork, interpersonal skills, and a proactive, energetic approach. Expertise in scripting languages like Perl, Python, and SKILL, along with experience in DRC and LVS checking flows and custom deck development, is crucial.