Senior IP Design Verification Engineer - XBAR IP

NVIDIA

4+ yrs Bengaluru Full Time Hybrid (office + remote)
NVIDIA logo
Posted : today
Actively hiring

Job description

Join NVIDIA as a Senior IP Design Verification Engineer and contribute to the cutting-edge memory subsystem units for world-leading GPUs and SOCs. This role offers a unique chance to make a significant impact in a rapidly evolving technology landscape, influencing product lines from consumer graphics to autonomous vehicles and AI. Be part of a global team dedicated to pushing technological boundaries and shaping the future of computing.

NVIDIA's GPUs have evolved from rendering virtual worlds to powering AI, acting as the core for intelligent systems. Recognized as a leader in AI computing, NVIDIA is at the forefront of innovation.

This position is ideal for experienced engineers passionate about advanced verification methodologies and complex ASIC designs.

Responsibilities

Take ownership of verifying complex ASIC designs, architectures, and micro-architectures for memory sub-systems. Define verification scope, develop robust verification infrastructure, and ensure design correctness.

Develop comprehensive test plans, create test scenarios, and build verification environments for sophisticated IPs and sub-systems. Construct reusable bus functional models, monitors, checkers, and scoreboards using coverage-driven verification methodologies. Implement advanced verification techniques including SystemVerilog/UVM and drive verification closure through functional coverage.

Collaborate closely with architects, designers, and pre- and post-silicon verification teams to achieve project goals.

Qualifications

We are seeking candidates with a B.Tech./M.Tech. degree or equivalent practical experience and a minimum of 4 years in relevant verification roles. A strong background in verifying complex IPs, units, and sub-systems is essential.

Proficiency in verification methodologies utilizing random stimulus, functional coverage, and assertion-based verification is required. Expertise in Verilog and knowledge of SystemVerilog or similar High-Level Verification Languages (HVLs) such as UVM or VMM are necessary.

Stand out with experience in memory subsystem or network interconnect IP verification. Strong debugging and analytical abilities, coupled with sound scripting knowledge, are highly valued. Excellent communication and teamwork skills are crucial for success in this role.

Essential Skills

VerilogSystemVerilogUVMVMMIP VerificationBus Functional ModelingAssertion-Based VerificationFunctional CoverageScripting

Good to Have

Memory Subsystem VerificationNetwork Interconnect IP Verification

Highlights

  • Actively hiring

More Details

RoleSenior IP Design Verification Engineer - XBAR IP
IndustrySemiconductors, AI / Machine Learning
DepartmentEngineering, Hardware Engineering, Design Verification
Employment TypeFull Time, Hybrid (office + remote)

About the Company

Nvidia logo

Nvidia

Semiconductors

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