Shape the future of AI/ML hardware acceleration by driving cutting-edge TPU technology that powers Google's most demanding applications. Join a team pushing boundaries to develop custom silicon solutions and contribute to innovation behind globally loved products. Leverage your design and verification expertise to ensure the reliability of complex digital designs, with a focus on TPU architecture and its integration within AI/ML-driven systems.

Our AI and Infrastructure team redefines possibilities, empowering Google customers with breakthrough capabilities at unparalleled scale. We are the driving force behind Google's groundbreaking innovations, delivering computing power and essential platforms for developers. From software to hardware, our teams are shaping world-leading hyperscale computing, working on TPUs, Vertex AI for Google Cloud, Global Networking, and more.

Own the complete verification lifecycle, from planning and test execution to coverage closure, ensuring stringent AI/ML performance and accuracy goals are met. Develop constrained-random verification environments using SystemVerilog and UVM to uncover corner-case bugs and guarantee the reliability of AI/ML workloads on TPU hardware. Collaborate closely with design and verification engineers on active projects.

Key tasks include planning digital design block verification, identifying critical verification scenarios with design engineers, and writing comprehensive coverage measures for stimulus and corner-cases. Debugging tests with design engineers is essential to deliver functionally correct design blocks. Progress towards tape-out will be measured by identifying verification holes.

A Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience, is required. We seek candidates with 8 years of experience in verification, adept at verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs. Experience in verifying and debugging IP/subsystem/SoCs within the networking domain, including packet processing, bandwidth management, and congestion control, is crucial. Proficiency in verifying digital systems using standard IP components and interconnects, such as microprocessor cores and hierarchical memory subsystems, is also necessary.