NVIDIA is at the forefront of technological innovation, from pioneering the GPU to revolutionizing AI computation. Join a dynamic and supportive environment where creativity and intelligence are amplified.

Our IODFX Engineering team is developing groundbreaking solutions for IO and interconnect testing on complex semiconductor chips. This role offers the chance to contribute to high-speed IO testing for a range of NVIDIA products, including consumer graphics, autonomous vehicles, and AI.

Embrace a culture of continuous learning and make a significant impact on the world through your work. We foster a diverse and inclusive workplace where your best efforts are inspired and supported.

Engage in POR to Post Silicon Testing of DFX features for high-speed IOs, focusing on manufacturing testability.

Architect, design, and validate test features, developing robust and scalable test plans at unit and SOC/Full Chip levels using UVM and NVIDIA internal tools.

Conduct pre-silicon simulation and debug, ensuring test functionality and signing off on test coverage using standard metrics.

Drive automation, flow development, improvement, coverage metrics, test execution, bug identification/fix, and IO-test productization.

Solve complex test challenges in mixed-signal environments and create scalable, cross-platform test solutions.

Utilize industry-standard tools for design and verification, including SV, UVM, Perl, and Python, and adapt to NVIDIA's custom tools and flows.

Collaborate closely with IP teams on IOBIST test-logic design and verification, and with Mixed Signal Circuit design teams to understand analog components.

Partner with other DFX teams, coordinate with Post Silicon Test Engineering and Production Engineering for efficient, quality productization.

We are seeking an engineer with a B.Tech/BE/BS or M.Tech/ME/MS in EE/ECE, or equivalent experience, and a minimum of 5 years in DFT and/or industry-standard verification flows.

Possess strong analytical and problem-solving skills, with a solid understanding of logic design, architecture, and verification.

Demonstrate a strong background in DFT Engineering and Post Si DFX Productization, along with excellent coding skills in industry-standard scripting languages.

Familiarity with constrained random testing, UVM, coverage metrics, profiling tools, and X Prop is a plus.

Outstanding written and oral communication skills are essential, coupled with a genuine curiosity to learn and grow.

This hybrid role offers competitive salaries, a generous benefits package, and the opportunity to work with some of the brightest minds in technology.