Senior ASIC Design Engineer - XBAR IP
NVIDIA
NVIDIA
Join NVIDIA's Graphics team as a Senior ASIC Design Engineer, contributing to cutting-edge memory subsystem components for industry-leading Graphics Processors. This role offers a significant impact on products spanning consumer graphics, autonomous vehicles, and artificial intelligence. You will be part of a global team pushing technological boundaries and shaping future computing platforms.
This position involves making critical architectural trade-offs to meet performance, power, and area targets. You will define micro-architectures, implement designs in RTL, and ensure comprehensive verification. Collaboration with architects, designers, verification, synthesis, timing, and backend teams is essential for successful project delivery.
Drive micro-architecture and RTL development for design modules.
Design features to optimize performance, power consumption, and area.
Collaborate with hardware architects to define key features.
Work closely with verification teams to ensure the correctness of implemented designs.
Partner with timing, VLSI, and physical design teams for timing closure and routability.
Interact with FPGA and software teams for design prototyping and validation.
Contribute to post-silicon verification and debugging efforts.
A Bachelor's or Master's degree in Engineering, or equivalent practical experience.
A minimum of 5 years of dedicated design experience.
Proven experience in RTL design of complex units across multiple projects.
Familiarity with design and verification tools such as VCS and debug tools like Debussy or GDB.
Deep understanding of the full ASIC design lifecycle, from RTL design and verification through to synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up, and lab debugging.
Expertise in Verilog is mandatory.
Nvidia
Semiconductors