Join Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) to power Microsoft's Intelligent Cloud mission. SCHIE builds the core infrastructure and foundational technologies for over 200 Microsoft online businesses, including Azure, Bing, and Office 365. As cloud business accelerates, delivering innovative silicon and infrastructure at scale is crucial. The Methodology, Infrastructure & Labs Engineering (MILE) organization within SCHIE is key to Microsoft's silicon strategy, responsible for end-to-end design methodologies, EDA/CAD ecosystems, and compute infrastructure for custom silicon like Azure Cobalt and Maia processors.

Lead technical initiatives in the Physical Design Methodology & CAD team in India. Define and drive end-to-end physical design methodologies, focusing on the PD construction space. Develop CAD strategy and flow architecture for Microsoft's silicon programs. Collaborate globally with engineering teams to create scalable, innovative, and robust solutions that accelerate silicon development and shape cloud infrastructure. Foster innovation and technical excellence in building world-class PD Methodologies & CAD solutions. Partner with engineering leaders worldwide to define and execute the long-term vision for PD methodologies and CAD solutions, enabling multi-vendor support and successful next-gen silicon product delivery. Drive scalable RTL-to-GDSII flows, automation, and design closure for predictable execution and first-pass silicon success. Lead the AI-driven transformation of physical design methodologies, CAD flows, and infrastructure by integrating advanced AI, ML, and automation to boost productivity, quality, and velocity. Influence industry direction through collaboration with EDA vendors, driving next-gen design technologies and methodology innovation.

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. Minimum of 12 years of technical engineering experience in Physical Design, CAD, EDA, or Silicon Engineering, with deep expertise in semiconductor design methodologies and workflows. Proven experience in defining, building, and scaling CAD methodologies, automation frameworks, and engineering workflows for complex SoC and ASIC development. Demonstrated success in influencing and aligning global engineering teams for cross-functional initiatives and complex silicon programs. Proven impact in driving engineering excellence through hands-on experience in methodology, automation, infrastructure, and tooling to improve productivity, quality, predictability, and time-to-market. Ability to meet stringent security screening requirements, including Microsoft Cloud Background Check and verification of citizenship or permanent residency for access to export-controlled information.