Join a pioneering team crafting custom silicon solutions that drive Google's consumer products. You will be instrumental in innovating hardware that enhances user experiences for millions globally. Your expertise will define the next era of hardware, delivering exceptional performance, efficiency, and seamless integration.

Our mission at Google is to structure the world's information and make it universally accessible and useful. This team merges Google's AI, Software, and Hardware capabilities to create genuinely helpful experiences. We are dedicated to researching, designing, and developing cutting-edge technologies and hardware to advance computing speed, fluidity, and power, ultimately aiming to improve lives through technology.

Develop comprehensive ASIC RTL2GDS implementation for designs demanding high Power, Performance, and Area (PPA).

Oversee physical implementation and Quality of Results (QoR) at both block and full-chip levels, focusing on power, timing, and area.

Requires a Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.

Must possess 8 years of specialized experience in physical design engineering.

Demonstrated experience in managing high-performance design schemas, particularly involving CPU or GPU architectures.

Preferred candidates will hold a Master's degree in Electrical Engineering or Computer Science, or possess equivalent practical experience.

Experience with advanced power optimization techniques is a plus.