NVIDIA is at the forefront of technological innovation, driving advancements in AI, graphics, and parallel computing. Our GPUs power groundbreaking research and redefine what's possible. Join a supportive and diverse team where creativity and intelligence are amplified, and make a lasting impact.

We are seeking a dedicated Senior Package Layout Engineer to contribute to the design of sophisticated IC substrates for NVIDIA's leading-edge products. This role involves close collaboration with technical leads and design teams, focusing on complex layout tasks, scheduling, cost management, and resolving manufacturing and electrical design challenges.

Collaborate within the Layout team to implement high-density ASIC packages and design substrate breakout patterns.

Optimize package pinouts by considering system-level trade-offs in pin assignments.

Execute package routing, placement, stack-up, reference plane, and power distribution using Cadence APD or SiP tool suites.

Propose and implement layout design trade-offs to the Technical Package Lead.

Conduct feasibility studies to assess package design goals for size, cost, and system performance.

Develop symbols and CAD library databases using Cadence APD design tools and create methodologies for enhancing layout productivity.

A Bachelor of Science in Electrical Engineering or equivalent experience is required.

Possess a minimum of 3 years of experience in PCB Layout for graphics cards, motherboards, line cards, or similar technologies. Experience with High-Density Interconnect (HDI) designs is considered a plus.

Demonstrated experience in substrate layout for wire bond and flip chip packages is preferred.

Significant background with Cadence APD or SiP and/or PCB layout tools, including Constraint Manager, is essential.

A solid understanding of high-speed design signal integrity practices is necessary.

Experience with Virtuoso and Calibre is beneficial, and familiarity with Valor is helpful.