Join NVIDIA as a Senior Verification Engineer, focusing on cutting-edge memory subsystem designs for industry-leading GPUs and SOCs. This role offers a significant opportunity to influence products across consumer graphics, autonomous vehicles, and artificial intelligence.

NVIDIA is at the forefront of AI computing, transforming industries with its GPU technology. Our team, comprised of global talent, is dedicated to pushing technological boundaries and shaping the future of computing.

Your primary responsibility will be to verify ASIC designs, architectures, and micro-architectures of memory sub-systems. This involves understanding designs, defining verification scope, developing infrastructure, and ensuring design correctness.

You will create comprehensive test plans, develop tests, and build reusable verification components like bus functional models, monitors, checkers, and scoreboards using SystemVerilog/UVM methodologies. Achieving functional coverage closure and collaborating with architects, designers, and pre/post-silicon teams will be key.

We are seeking candidates with a B.Tech./M.Tech. or equivalent experience, possessing at least 1 year of relevant experience. A strong background in verifying complex IPs, sub-systems, and units using random stimulus, functional coverage, and assertion-based methodologies is essential.

Expertise in Verilog is required, along with knowledge of SystemVerilog, HVLs (like UVM or VMM). Experience in memory subsystem or network interconnect IP verification, coupled with strong debugging and analytical skills, and sound scripting knowledge, will set you apart. Excellent communication and teamwork abilities are also highly valued.