Join NVIDIA as a Hardware Quality Assurance Engineer and drive significant quality improvements in cutting-edge products. This role offers a unique opportunity to collaborate across test and development teams, enhancing your skillset and building deep domain expertise in SoC Hardware and Software.

NVIDIA is at the forefront of intelligent machines, powering AI with its GPUs. Become part of a team that's shaping the future of computing, enabling machines to learn, reason, and interact with the world. We are committed to fostering a diverse and inclusive workplace, ensuring everyone has the opportunity to thrive.

Design, build, and implement comprehensive test cases and test plans for pre-silicon (FPGA) and silicon validation platforms, utilizing Data Center Server OS/ARM Linux.

Develop and validate test plans covering essential platform components like OS Kernel, CPU, Memory, and various I/O interfaces (C2C, USB, PCIe, Ethernet).

Engineer and deploy automated testing frameworks to elevate verification processes and ensure reliability in our testing pipelines, incorporating LLM/GenAI for stress and stability testing.

Create specific workloads and identify optimal tools to validate new chip features and functionalities.

Collaborate closely with multi-functional teams, including hardware ASIC, FPGA, and SW development, to refine requirements, products, and test methodologies.

Actively troubleshoot bugs, provide effective resolutions, and play a pivotal role in bug fixing.

A Bachelor's or Master's degree in Computer Science, Electronics, or Telecommunication is required.

Possess at least 3 years of extensive experience in test development, execution, and validation for pre-silicon and silicon environments, specifically within Embedded/SoC (Android/Linux/WOA) platforms.

Demonstrate strong hands-on expertise in Windows on Arm (WOA) and GPU validation, encompassing test planning, execution, debugging, and issue resolution during SoC/platform bring-up.

Exhibit a solid grasp of SoC architecture, platform bring-up, and IP-level validation (e.g., USB, display, GPU, LSIO), with the capability to debug across HW, FW, and SW.

Apply practical knowledge of AI/LLM fundamentals to enhance validation strategies, log/trace analysis, triage, and test-tool development.

Leverage GenAI and LLM tools to optimize test strategies, automate script/harness generation, and boost coverage, cycle time, and debug efficiency.

Proven ability to design and develop custom validation tools, robust test frameworks, and automation infrastructure.

Experience in creating workloads and test methodologies to rigorously exercise chip features, including stress and stability testing.

Hands-on validation experience with critical interfaces such as PCIe, USB3, CPU, and memory, or equivalent SoC/platform interfaces.

Strong knowledge of Linux kernel, bootloader, device drivers, and firmware testing, complemented by an understanding of virtualization concepts and multicore/multiprocessing fundamentals.