Join NVIDIA as a highly motivated Verification Engineer, contributing to the verification of next-generation control subsystems for industry-leading GPUs. This role offers the chance to make a significant impact in a dynamic, tech-focused company, with product lines spanning consumer graphics, self-driving cars, and artificial intelligence. Become part of a global team pushing the boundaries of what's possible in parallel and visual computing.

NVIDIA's GPUs have evolved from powering virtual worlds to simulating human intelligence, driving AI advancements in computers, robots, and autonomous vehicles. We are recognized as a leading AI computing company, transforming how graphics solve complex computer science challenges.

As a vital member of our ASIC Verification team, you will be instrumental in verifying graphics and compute features within an IP. Your responsibilities will include:

- IP-level verification of GPU ASICs, encompassing design, architecture, golden models, and micro-architecture using advanced tools and methodologies. - Ensuring functional and code coverage across all RTL designs through rigorous specification adherence. - Understanding design implementation, defining verification scope, developing verification infrastructure, and confirming design correctness. - Collaborating closely with HW architects, designers, and fellow verification team members to achieve project goals.

We are looking for candidates with:

- A B.Tech./M.Tech. degree and at least 1 year of relevant experience. - Proficiency in Verilog, C++, and Object-Oriented Programming (OOPs) concepts. - Practical experience in verification at Unit, Sub-system, or SOC levels. - Familiarity with design and verification tools such as VCS or equivalent simulation tools, and debug tools like Debussy and GDB. - A solid understanding of computer architecture principles. - Strong technical fundamentals coupled with excellent analytical and problem-solving skills.

Experience with SystemVerilog or similar High-Level Verification Languages (HVLs) and methodologies like UVM/VMM is highly advantageous. Exposure to industry-standard simulation and debug tools is also beneficial.