Join a pioneering team crafting bespoke silicon solutions integral to Google's direct-to-consumer products. Your contributions will drive innovation for globally recognized products, shaping the next wave of hardware experiences. Focus on delivering exceptional performance, efficiency, and seamless integration.

Our mission at Google is to make information universally accessible and useful. This team leverages Google's expertise in AI, Software, and Hardware to create groundbreaking, helpful experiences. We are dedicated to researching, designing, and developing cutting-edge technologies and hardware to enhance computing power, speed, and fluidity, ultimately improving lives through technology.

Spearhead comprehensive verification efforts for intricate System-on-Chip (SoC) architectures, ensuring superior quality from pre-silicon stages through tape-out.

Lead and mentor high-performing engineering teams, driving project execution, cultivating technical excellence, and fostering professional development.

Direct SoC-level pre-silicon emulation strategies (e.g., Palladium, Zebu, SimXL) to expedite hardware-software co-verification, OS boot processes, and early detection of complex system bugs.

Oversee complex post-silicon debugging, collaborating with validation teams to resolve silicon issues, facilitate hardware bring-up, and align pre-silicon verification coverage with actual silicon behavior.

Develop and enhance logic verification infrastructure and advanced methodologies across the SoC, maintaining robust integration with architecture, design, and cross-functional teams.

A Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience is essential, complemented by at least 15 years of experience in front-end design or design verification.

Demonstrated expertise in power-aware verification methodologies, coupled with a deep understanding of fabric and interconnect architectures and cache coherency protocols.

Preferred qualifications include a Master's degree in Electrical Engineering or Computer Science, or equivalent practical experience. Experience in verifying high-bandwidth memory subsystems (DDR5, LPDDR5, HBM) is highly valued.

Extensive experience leading engineering teams to successfully deliver complex SoCs is required. Technical proficiency in SoC-level verification, UVM-based environments, pre-silicon emulation platforms, and hardware accelerators is crucial. Strong programming skills in SystemVerilog, Verilog, and scripting languages like Python or Perl are necessary.