Shape the future of AI/ML hardware acceleration by driving Tensor Processing Unit (TPU) technology. This role offers the chance to develop custom silicon solutions powering Google's most demanding AI/ML applications and future innovations.

Contribute to the cutting edge of AI and Infrastructure, redefining possibilities and empowering Google customers with breakthrough capabilities. Join a team focused on unparalleled scale, efficiency, and reliability for AI models and computing power.

Take ownership of the complete verification life cycle, from planning and test execution to coverage closure, ensuring stringent AI/ML performance and accuracy goals are met.

Develop constrained-random verification environments using SystemVerilog and UVM to identify corner-case bugs and guarantee the reliability of AI/ML workloads on TPU hardware.

Collaborate closely with design and verification engineers on active projects, planning verification for digital design blocks and identifying critical verification scenarios. Write various coverage measures for stimulus and corner-cases to pinpoint verification gaps and demonstrate progress towards tape-out.

Possess a Bachelor's degree in Electrical Engineering or equivalent practical experience, coupled with 4 years of experience in verification. This includes verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.

Demonstrate experience verifying digital systems with standard IP components and interconnects, such as microprocessor cores and hierarchical memory subsystems. Expertise in the verification and debugging of IP, subsystems, and SoCs within the networking domain, including packet processing, bandwidth management, and congestion control is also required.