Join a dynamic and agile team focused on developing cutting-edge CPU verification infrastructure tools and test frameworks. This role is instrumental in shaping NVIDIA's development environments, enabling rapid technological advancement.

We are seeking a creative and hardworking engineer passionate about building the sophisticated tools and infrastructure that power RTL simulations, C-simulations, Emulation, FPGA, and on-Silicon testing. Your contributions will ensure the highest quality of test frameworks and tools delivered by our team.

This position offers a unique opportunity to contribute to complex systems, involving detailed understanding of CPU, GPU, SOC system, and boot architectures. If you thrive in a challenging environment and are eager to make a significant impact, we want to hear from you.

Develop and enhance tools, infrastructure, and test frameworks across RTL simulations, C-simulations, Emulation, FPGA, and on-Silicon environments. Gain a deep understanding of Tegra system architecture, focusing on IPs critical for boot and security features.

Build tools that empower Design and Verification teams with advanced access to registers, memory, DMA engines, and other system features. Enable test re-use across diverse platforms, including RTL, models, Emulation, and Silicon. Contribute to Silicon bring-up features such as FUSE, ATE, Security, Flash/DMA, and Board I2Cs.

Assess and build C-model or RTL-simulation capabilities to validate features in pre-silicon environments before Silicon arrival. Drive the development of scalable and maintainable software, taking pride in building robust solutions.

A Bachelor's or Master's degree in Computer Science or Electronics Engineering, or equivalent experience, coupled with over 5 years of professional experience is required.

Proficiency in C, C++, and Python is essential. A strong understanding of SOC and system architecture, including the functional aspects of devices like DMA, interrupt engines, CPUs, boot devices, and MMU/IOMMU, is necessary.

Familiarity with Operating System and Device-Driver concepts, along with the ability to write bare-metal test frameworks for direct SOC execution, is crucial. Experience with Hardware and/or Software development lifecycles is also expected.