Join NVIDIA, a leader in GPU innovation and AI computation, and amplify human creativity and intelligence. We are seeking a skilled CAD Layout Design Engineer to join our dynamic Layout Methodology team. This role is crucial for accelerating layout creation, boosting productivity, and reducing time-to-market for NVIDIA's digital IPs, including SRAM layouts and custom Analog blocks.

This is an opportunity to shape the future of layout design. You will be at the forefront of exploring new technologies, creating essential design assets, and driving innovation in layout creation tools and methodologies. Become an integral part of a supportive and diverse environment where groundbreaking work is encouraged.

Spearhead in-depth studies of new technologies, enabling design teams to adopt advanced layout techniques.

Develop digital IP, including PCELL creation, SRAM leaf cells, and productivity scripts for new technologies.

Collaborate on analyzing new technology, translating findings into practical guidelines for EMIR, DFM, and SRAM layout.

Investigate and evaluate next-generation tools and the application of Machine Learning, Deep Learning, and LLM techniques for layout creation.

A BE or M-Tech in Electrical & Electronics, or equivalent practical experience, is required.

Possess a minimum of 5 years of demonstrated experience in project cycles and tape-outs for SRAM/Analog layout design.

Expertise in advanced technology nodes such as 5nm, 3nm, or 2nm is mandatory.

Solid proficiency and expertise in Cadence SKILL language are essential.

Significant experience with PCELL development is a key requirement.

Strong scripting skills in Python, Perl, and Shell are necessary.

Excellent social, teamwork, presentation, and influencing skills, with the ability to communicate new ideas effectively to various teams.