Join NVIDIA's System-On-Chip (SOC) group as an ASIC Design Engineer and contribute to the creation of the world's most advanced chips. As chip complexity continues to grow, with tens of billions of transistors packed into each device, we seek talented engineers with a passion for RTL design and innovative methodologies.

This role offers an exciting opportunity to work on cutting-edge technology and shape the future of computing. If you are driven by design excellence and have a keen interest in performance monitoring, we encourage you to apply.

As a key member of our team, you will define and develop system-level RTL and advanced methodologies for performance measurement on industry-leading GPUs/SOCs. Your responsibilities will encompass the entire SOC design cycle, including RTL feature design, implementation, and rigorous quality checks such as CDC, RDC, Linting, Synthesis, and Logic Equivalence.

You will also be instrumental in defining, developing, and automating flows and methodologies for efficient system-level IP development. Collaboration is crucial; you'll work closely with architects, designers, verification engineers, and software engineers to achieve project goals.

We are seeking candidates with a B.Tech or M.Tech in Electronics or Computer Engineering, complemented by at least 3 years of relevant industry experience. Essential skills include strong proficiency in RTL design using Verilog, familiarity with SOC design and implementation flows, and expertise in design automation.

A solid understanding of SOC/IP architecture, including data flow, control mechanisms, multiple clock/power domains, and latency analysis, is required. Proficiency in scripting languages like Perl or Python, excellent debugging and analytical skills, and exposure to design and verification tools are also necessary. Strong communication and collaboration abilities, along with adeptness in using AI tools for problem-solving, are highly valued.