Join NVIDIA, a leader in transforming graphics, gaming, and accelerated computing for over 25 years. We are pioneering the next era of computing powered by AI, where our GPUs are central to intelligent systems. As an NVIDIAN, you'll thrive in a supportive, diverse environment, empowered to do your best work and make a global impact.

We are seeking skilled RTL Design Engineers for our High Speed IO IPs, integral to next-generation automotive chips. This role focuses on developing IPs for UFS, Ethernet, PCIe, and USB, requiring strong digital design and verification fundamentals.

As a key designer, you will delve into specific protocol concepts and features, making crucial architectural trade-offs to balance performance, power, and feature sets. You'll analyze system implications, define micro-architectures, implement RTL, lead verification efforts, ensure timing closure, and provide support during silicon validation.

Key responsibilities include: - Owning micro-architecture and RTL development for design modules. - Designing features to meet stringent performance, power, and area targets. - Collaborating with HW architects to define critical features. - Partnering with verification teams to guarantee implementation correctness. - Working with timing, VLSI, and Physical Design teams to meet timing and interface specifications, and ensure routability.

We are looking for candidates with a B.Tech/M.Tech in EE, ECE, or a related field, possessing a proven track record of at least 2 years in designing complex units and CPU/micro-controller based sub-systems.

Essential qualifications include strong digital design and verification fundamentals. Familiarity with High-Speed IO standards, protocols, and modern SOC architectures is a significant advantage.

We value excellent influencing skills for cross-cultural collaboration, strong debugging, analytical, and problem-solving abilities, alongside great interpersonal skills essential for effective teamwork. Experience with AI tools like Claude and Cursor is a plus.