Join NVIDIA, a leader in transforming computer graphics, PC gaming, and accelerated computing. We are at the forefront of AI, defining the next era of computing where our GPUs power intelligent systems. As an NVIDIAN, you'll be part of a diverse and supportive environment, inspired to do your best work and make a lasting impact.

As an RTL Design Engineer for High Speed IO IPs, you will implement USB, UFS, Ethernet, or PCIe IPs for next-generation automotive chips. Responsibilities include architectural trade-offs, system implication analysis, micro-architecture design, RTL implementation, verification leadership, timing closure, and silicon validation support. You will own micro-architecture and RTL development, design features for performance, power, and area, collaborate with HW architects, and partner with verification, timing, and physical design teams.

We seek candidates with a B.Tech or M.Tech degree and over 2 years of experience in designing complex units and CPU/micro-controller based sub-systems. Strong digital design and verification fundamentals are essential. Knowledge of modern SOC security standards, protocols, and architectures is a significant plus. Excellent influencing, debugging, analytical, problem-solving, and teamwork skills are required to collaborate effectively across diverse, multi-geography teams.