ASIC Design Engineer, BOOT and Power Management
NVIDIA
NVIDIA
Join NVIDIA, a leader in transforming computer graphics, gaming, and accelerated computing, now at the forefront of AI.
We're seeking talented RTL Design Engineers to contribute to our BOOT and Power Management Subsystem Design for next-generation Automotive and Client chips. This is an opportunity to be a primary designer, shaping the system BOOT and power management architecture.
Ideal candidates possess strong digital design and verification fundamentals, ready to innovate in a diverse and supportive environment.
As a key designer, you will own the micro-architecture and RTL development of design modules, focusing on performance, power, and area constraints.
You will collaborate with HW architects to define critical features, and work closely with verification teams to ensure design correctness. Furthermore, you'll partner with VLSI and Physical Design teams to guarantee the design meets timing, interface, and routability requirements.
Your role will involve making architectural trade-offs, analyzing system implications, and supporting silicon validation.
We are looking for individuals with a B.Tech or M.Tech degree and at least 2 years of experience in designing complex units and CPU/micro-controller-based subsystems.
Knowledge of security standards, protocols, and system security architectures for modern SOCs is a significant advantage. Excellent influencing and interpersonal skills are essential for collaborating effectively with cross-cultural, multi-geography teams.
Strong debugging, analytical, and problem-solving capabilities, along with a passion for technology and improving the state of the art, are highly valued. If you are creative, independent, and a team player, we encourage you to apply.
Nvidia
Semiconductors